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5-channel, unidirectional digital isolator data sheet ADUM1510 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2008C2012 analog devices, inc. all rights reserved. features rohs compliant, 16-lead, wide body soic package low power operation: 5 v 1.3 ma per channel maximum @ 0 mbps to 2 mbps 3.3 ma per channel maximum @ 10 mbps high temperature operation: 105c up to 10 mbps data rate (nrz) low default output state safety and regulatory approvals ul recognition: 2500 v rms for 1 minute per ul 1577 applications general-purpose, unidirectional, multichannel isolation general description the ADUM1510 1 is a unidirectional, 5-channel isolator based on the analog devices, inc., i coupler? technology. combining high speed cmos and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics superior to alternatives such as optocoupler devices. by avoiding the use of leds and photodiodes, i coupler devices eliminate the design difficulties commonly associated with optocouplers. the typical optocoupler concerns regarding uncertain current transfer ratios, nonlinear transfer functions, and temperature and lifetime effects are eliminated with the simple i coupler digital interfaces and stable performance characteristics. the need for external drivers and other discrete components is eliminated with i coupler products. in addition, i coupler devices run at one-tenth to one-sixth the power consumption of optocouplers at comparable signal data rates. the ADUM1510 isolator provides five independent isolation channels supporting data rates up to 10 mbps. the ADUM1510 operates with the supply voltage of either side ranging from 4.5 v to 5.5 v. unlike other optocoupler alternatives, the ADUM1510 isolator has a patented refresh feature that ensures dc correctness in the absence of input logic transitions and during power-up/ power-down conditions. 1 protected by u.s. patents 5,952,849; 6,873,065; and 7,075,329. functional block diagram encode decode encode decode encode decode encode decode encode decode v dd1 gnd 1 v ia v ib v ic v id v ie gnd 1 v dd2 gnd 2 v oa v ob v oc v od v oe gnd 2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ADUM1510 06790-001 figure 1. http://
ADUM1510 data sheet rev. b | page 2 of 12 table of contents features .............................................................................................. 1 ? applications....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? specifications..................................................................................... 3 ? electrical characteristics5 v operation................................ 3 ? package characteristics ............................................................... 4 ? regulatory information............................................................... 4 ? insulation and safety-related specifications............................ 4 ? recommended operating conditions ...................................... 4 absolute maximum ratings ............................................................5 ? esd caution...................................................................................5 ? pin configuration and function descriptions..............................6 ? typical performance characteristics ..............................................7 ? applications information .................................................................8 ? pcb layout ....................................................................................8 ? propagation delay-related parameters......................................8 ? dc correctness and magnetic field immunity.............................8 ? power consumption .....................................................................9 ? power-up/power-down considerations ...................................9 ? outline dimensions ....................................................................... 11 ? ordering guide .......................................................................... 11 ? revision history 3/12rev. a to rev. b created hyperlink for safety and regulatory approvals entry in features section................................................................. 1 change to pcb layout section....................................................... 8 updated outline dimensions ....................................................... 11 9/08revision a: initial version http://
data sheet ADUM1510 rev. b | page 3 of 12 specifications electrical characteristics5 v operation all voltages are relative to their respective ground. 4.5 v v dd1 5.5 v, 4.5 v v dd2 5.5 v; all minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted; all typical specifications are at t a = 25c, v dd1 = v dd2 = 5 v. table 1. parameter symbol min typ max unit test conditions dc specifications input quiescent supply current per channel i ddi (q) 0.40 0.80 ma output quiescent supply current per channel i ddo (q) 0.30 0.50 ma total supply current, five channels 1 v dd1 supply current, quiescent i dd1 (q) 2.0 4.0 ma v ia = v ib = v ic = v id = v ie = 0 v v dd2 supply current, quiescent i dd2 (q) 1.5 2.5 ma v ia = v ib = v ic = v id = v ie = 0 v v dd1 supply current, 10 mbps data rate i dd1 (10) 7.5 12.0 ma 5 mhz logic signal frequency v dd2 supply current, 10 mbps data rate i dd2 (10) 3.1 4.5 ma 5 mhz logic signal frequency input currents i ia , i ib , i ic , i id , i ie ?10 +1 +10 a v ia , v ib , v ic , v id , v ie 0 v logic high input threshold v ih 2.0 v logic low input threshold v il 0.8 v logic high output voltages v oah , v obh , v och , v odh , v oeh v dd2 ? 0.4 4.8 v i ox = ?4 ma, v ix = v ih logic low output voltages v oal , v obl , v ocl , v odl , v oel 0.2 0.4 v i ox = +4 ma, v ix = v il switching specifications minimum pulse width 2 pw 100 ns c l = 15 pf, cmos signal levels maximum data rate 3 10 mbps c l = 15 pf, cmos signal levels propagation delay 4 t phl , t plh 20 30 50 ns c l = 15 pf, cmos signal levels pulse width distortion, |t plh ? t phl | 4 pwd 5 ns c l = 15 pf, cmos signal levels change vs. temperature 5 ps/c c l = 15 pf, cmos signal levels propagation delay skew 5 t psk 30 ns c l = 15 pf, cmos signal levels channel-to-channel matching 6 t pskcd 5 ns c l = 15 pf, cmos signal levels output rise/fall time (10% to 90%) t r /t f 2.5 ns c l = 15 pf, cmos signal levels common-mode transient immunity at logic high output 7 |cm h | 25 35 kv/s v ix = v dd1 /v dd2 , v cm = 1000 v, transient magnitude = 800 v common-mode transient immunity at logic low output 7 |cm l | 25 35 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v refresh rate f r 1.0 mbps input dynamic supply current per channel 8 i ddi (d) 0.122 ma/mbps output dynamic supply current per channel 8 i ddo (d) 0.036 ma/mbps 1 supply current values are for all five ch annels combined running at identical data rates. output supply current values are spe cified with no output load present. the supply current associated with an individual ch annel operating at a given da ta rate is calculated as described in the section. see figur through for information on the per-channel supply current as a function of the da ta rate for unloaded an d loaded conditions. s ee and for total i dd1 and i dd2 supply currents as a function of the data rate for the ADUM1510. power con sumption ower consu mption e 4 figure 4 figure 6 figure 6 figure 7 figure 8 2 the minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. operation bel ow the minimum pulse width is not recommended. 3 the maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. 4 t phl propagation delay is measured from the 50% level of the falling edge of the v ix signal to the 50% level of the falling edge of the v ox signal. t plh propagation delay is measured from the 50% level of the rising edge of the v ix signal to the 50% level of the rising edge of the v ox signal. 5 t psk is the magnitude of the worst-case difference in t phl and/or t plh that is measured between units at the same operating temperat ure, supply voltages, and output load within the recommended operating conditions. 6 channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels within the same component. 7 cm h is the maximum common-mode voltage slew rate that can be sustained while maintaining v ox > 0.8 v dd2 . cm l is the maximum common-mode voltage slew rate that can be sustained while maintaining v ox < 0.8 v. the common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. the transient magnitude is the range over which the common mode is slewed. 8 dynamic supply current is the incremental amo unt of supply current required for a 1 m bps increase in the signal data rate. see through for infor- mation on the per-channel supply current as a function of the data rate for unloaded and loaded conditions. see the p section for guidance on calculating the per-channel supply current for a given data rate. http://
ADUM1510 data sheet rev. b | page 4 of 12 package characteristics table 2. parameter symbol min typ max unit test conditions resistance (input-to-output) 1 r i-o 10 12 capacitance (input-to-output) 2 c i-o 2.2 pf f = 1 mhz input capacitance 2 c i 4.0 pf ic junction-to-case thermal resistance, side 1 jci 33 c/w thermocouple located at center of package underside ic junction-to-case thermal resistance, side 2 jco 28 c/w thermocouple located at center of package underside 1 the device is considered a two-terminal device. pin 1 through pin 8 are shorted together, and pin 9 through pin 16 are shorted together. 2 input capacitance is from any input data pin to ground. regulatory information the ADUM1510 has been approved by the following organization upon product release, as shown in tabl e 3. table 3. ul recognized under ul 1577 component recognition program 1 double/reinforced insulation, 2500 v rms isolation voltage file e214100 1 in accordance with ul 1577, each ADUM1510 is proof-tested by applying an insulation test voltage 3000 v rms for 1 sec (curren t leakage detection limit = 5 a). insulation and safety-related specifications table 4. parameter symbol value unit conditions rated dielectric insulation voltage 2500 v rms 1 minute duration minimum external air gap (clearance) l(i01) 7.7 min mm measured from input terminals to output terminals, shortest distance through air minimum external tracking (creepage) l(i02) 8.1 min mm measured from input terminals to output terminals, shortest distance path along body minimum internal gap (internal clearance) 0.017 min mm insulation distance through insulation tracking resistance (comparative tracking index) cti >175 v din iec 112/vde 0303 part 1 isolation group iiia material group (din vde 0110, 1/89, table 1) maximum working voltage compatible with 50 years service life v iorm 565 v peak continuous peak voltage across the isolation barrier recommended operat ing conditions all voltages are relative to their respective ground. see the dc correctness and magnetic field immunity section for information on immunity to external magnetic fields. table 5. parameter symbol min typ max unit operating temperature t a ?40 +105 c supply voltages v dd1 , v dd2 4.5 5.5 v input signal rise and fall times 1.0 ms http://
data sheet ADUM1510 rev. b | page 5 of 12 absolute maximum ratings ambient temperature t a = 25c, unless otherwise noted. table 6. parameter rating storage temperature (t st ) range ?65c to +150c ambient operating temperature (t a ) range ?40c to +105c supply voltages 1 (v dd1 , v dd2 ) ?0.5 v to +7.0 v input voltages 1 (v ia , v ib , v ic , v id , v ie ) ?0.5 v to v ddi + 0.5 v output voltages 1 (v oa , v ob , v oc , v od , v oe ) ?0.5 v to v ddo + 0.5 v average output current per pin 2 side 1 (i o1 ) ?18 ma to +18 ma side 2 (i o2 ) ?22 ma to +22 ma common-mode transients 3 ?100 kv/s to +100 kv/s 1 all voltages are relative to their respective ground. 2 see figure 3 for maximum rated current values for various temperatures. 3 refers to common-mode transients across the insulation barrier. common- mode transients exceeding the abso lute maximum ratings may cause latch- up or permanent damage. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution http://
ADUM1510 data sheet rev. b | page 6 of 12 pin configuration and fu nction descriptions v dd1 1 gnd 1 * 2 v ia 3 v ib 4 v dd2 16 gnd 2 * 15 v oa 14 v ob 13 v ic 5 v oc 12 v id 6 v od 11 v ie 7 v oe 10 gnd 1 * 8 gnd 2 * 9 ADUM1510 top view (not to scale) * pin 2 and pin 8 are internally connected. connecting both to gnd 1 is recommended. pin 9 and pin 15 are internally connected. connecting both to gnd 2 is recommended. 0 6790-002 figure 2. pin configuration table 7. pin function descriptions pin no. mnemonic description 1 v dd1 supply voltage for isolator side 1 (4.5 v to 5.5 v). 2, 8 gnd 1 ground 1. ground reference for isolator side 1. pin 2 and pin 8 are internally connected, and connecting both to gnd 1 is recommended. 3 v ia logic input a. 4 v ib logic input b. 5 v ic logic input c. 6 v id logic input d. 7 v ie logic input e. 9, 15 gnd 2 ground 2. ground reference for isolator side 2. pin 9 and pin 15 are internally connected, and connecting both to gnd 2 is recommended. 10 v oe logic output e. 11 v od logic output d. 12 v oc logic output c. 13 v ob logic output b. 14 v oa logic output a. 16 v dd2 supply voltage for isolator side 2 (4.5 v to 5.5 v). table 8. truth table (positive logic) v ix input 1 v dd1 state v dd2 state v ox output 1 description h powered powered h normal operation, data is high. l powered powered l normal operation, data is low. x unpowered powered l input unpowered. outputs return to input state within 1 s of v dd1 power restoration. see the power-up/power-down considerations section for more details. x powered unpowered z output unpowered. output pins are in high impedance state. outputs return to input state within 1 s of v dd2 power restoration. see the power-up/power-down considerations section for more details. 1 v ix and v ox refer to the input and output signals of a given channel (a, b, c, d, or e). http://
data sheet ADUM1510 rev. b | page 7 of 12 case temperature (c) safety-limiting current (ma) 0 0 350 300 250 200 150 100 50 50 100 150 200 typical performance characteristics side 1 side 2 06790-003 data rate (mbps) v dd1 current/channe l (ma) 0 0 1.6 1.2 1.4 1.0 0.8 0.6 0.4 0.2 24681 0 figure 3. thermal derating curve, dependence of safety-limiting values with case temperature per din v vde v 0884-10 06790-004 dd2 current/channe l (ma) 1.6 1.2 1.4 1.0 0.8 0.6 0.4 0 figure 4. typical input supply cu rrent per channel vs. data rate data rate (mbps) v 0 0 0.2 24681 06790-005 figure 5. typical output supply current per channel vs. data rate (no output load) data rate (mbps) v dd2 current/channel, 15pf load (ma) 0 0 1.6 1.2 1.4 1.0 0.8 0.6 0.4 0.2 24681 0 0 6790-006 figure 6. typical output supply current per channel vs. data rate (15 pf output load) data rate (mbps) v dd1 current (ma) 0 0 8 6 7 5 4 3 2 1 24681 0 06790-007 figure 7. typical total v dd1 supply current vs. data rate data rate (mbps) v dd2 current, 15pf load (ma) 0 0 8 6 7 5 4 3 2 1 24681 0 06790-008 figure 8. typical total v dd2 supply current vs. data rate (15 pf output load) http://
ADUM1510 data sheet rev. b | page 8 of 12 applications information pcb layout the ADUM1510 digital isolator requires no external interface circuitry for the logic interfaces. power supply bypassing is strongly recommended at the input and output supply pins (see figure 9 ). bypass capacitors are most conveniently connected between pin 1 and pin 2 for v dd1 and between pin 15 and pin 16 for v dd2 . the capacitor value should be between 0.01 f and 0.1 f. the total lead length between both ends of the capacitor and the input power supply pin must not exceed 10 mm. bypass- ing between pin 1 and pin 8 and between pin 9 and pin 16 should also be considered unless the ground pair on each package side is connected close to the package. v dd1 gnd 1 v ia v ib v ic v id v ie gnd 1 v dd2 gnd 2 v oa v ob v oc v od v oe gnd 2 ADUM1510 0 6790-009 figure 9. recommended pcb layout see the an-1109 application note for board layout guidelines. propagation delay-related parameters propagation delay is a parameter that describes the length of time it takes for a logic signal to propagate through a component. the propagation delay to a logic low output can differ from the propagation delay to a logic high output. input ( v ix ) output (v ox ) t plh t phl 50% 50% 06790-010 figure 10. propagation delay parameters pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the timing of the input signal is preserved. channel-to-channel matching refers to the maximum amount that the propagation delay differs between channels within a single ADUM1510 component. propagation delay skew refers to the maximum amount that the propagation delay differs among multiple ADUM1510 components operated under the same conditions. dc correctness and magnetic field immunity positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent via the transformer to the decoder. the decoder is bistable and is, therefore, either set or reset by the pulses indicating input logic transitions. in the absence of logic transitions at the input for more than ~1 s, a periodic set of refresh pulses indicative of the correct input state is sent to ensure dc correctness at the output. if the decoder receives no pulses for more than approximately 5 s, the input side is assumed to be unpowered or nonfunctional, in which case, the isolator output is forced to a default low state by the watchdog timer circuit (see table 8 ). the limitation on the magnetic field immunity of the device is set by the condition in which induced voltage in the transformer receiving coil is sufficiently large to either falsely set or reset the decoder. the analysis below defines such conditions. in the follow- ing analysis, the ADUM1510 is examined in a 3 v operating condition because it represents the most susceptible mode of operation of all products in its product family. the pulses at the transformer output have an amplitude greater than 1.0 v. the decoder has a sensing threshold of approximately 0.5 v, thus establishing a 0.5 v margin in which induced voltages can be tolerated. the voltage induced across the receiving coil is given by v = (? d / dt ) ? r n 2 ; n = 1, 2, n where: is the magnetic flux density (gauss). r n is the radius of the nth turn in the receiving coil (cm). n is the number of turns in the receiving coil. given the geometry of the receiving coil in the ADUM1510 and an imposed requirement that the induced voltage be at most 50% of the 0.5 v margin at the decoder, a maximum allowable magnetic field can be calculated, as shown in figure 11 . magnetic field frequency (hz) 100 maximum allowable magnetic flux density (kgauss) 0.001 1m 10 0.01 1k 10k 10m 0.1 1 100m 100k 06790-011 figure 11. maximum allowable external magnetic flux density for example, at a magnetic field frequency of 1 mhz, the maxi- mum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 v at the receiving coil. this voltage is approximately 50% of the sensing threshold and does not cause a faulty output transition. similarly, if such an event occurs during a transmitted pulse (and is of the worst-case polarity), the received pulse is reduced from >1.0 v to 0.75 v, still well above the 0.5 v sensing threshold of the decoder. http://
data sheet ADUM1510 rev. b | page 9 of 12 the preceding magnetic flux density values correspond to specific current magnitudes at given distances away from the ADUM1510 transformers. figure 12 expresses these allowable current magnitudes as a function of frequency for selected distances. as seen in figure 12, the ADUM1510 is extremely immune and is affected only by extremely large currents operated at high frequency and very close to the component. for example, at a magnetic field frequency of 1 mhz, a 0.5 ka current would need to be placed 5 mm away from the ADUM1510 to affect the operation of the component. magnetic field frequency (hz) maximum allowable current (ka) 1000 100 10 1 0.1 0.01 1k 10k 100m 100k 1m 10m distance = 5mm distance = 1m distance = 100mm 06790-012 figure 12. maximum allowable current for various current-to-ADUM1510 spacings note that at combinations of strong magnetic field and high frequency, any loops formed by pcb traces can induce sufficiently large error voltages to trigger the thresholds of succeeding circuitry. care should be taken in the layout of such traces to avoid this possibility. power consumption the supply current at a given channel of the ADUM1510 isolator is a function of the supply voltage, the channel data rate, and the channel output load. for each input channel, the supply current is given by i ddi = i ddi (q) f 0.5 f r i ddi = i ddi (d) (2 f ? f r ) + i ddi (q) f > 0.5 f r for each output channel, the supply current is given by i ddo = i ddo (q) f 0.5 f r i ddo = ( i ddo (d) + c l v ddo ) (2 f ? f r ) + i ddo (q) f 0.5 f r where: i ddi (q) , i ddo (q) are the specified input and output quiescent supply currents (ma). i ddi (d) , i ddo (d) are the input and output dynamic supply currents per channel (ma/mbps). c l is the output load capacitance (pf). v ddo is the output supply voltage (v). f is the input logic signal frequency (mhz, half of the input data rate, nrz signaling). f r is the input stage refresh rate (mbps). to calculate the total i dd1 and i dd2 supply current, the supply currents for each input and output channel corresponding to i dd1 and i dd2 are calculated and totaled. figure 4 and figure 5 provide per-channel supply currents as a function of the data rate for an unloaded output condition. figure 6 provides per- channel supply current as a function of the data rate for a 15 pf output condition. figure 7 and figure 8 provide total i dd1 and i dd2 supply current as a function of the data rate for ADUM1510 products. power-up/power-down considerations given that the ADUM1510 has separate supplies on each side of the isolation barrier, the power-up and power-down charac- teristics relative to each supply voltage need to be considered individually. as shown in table 8, when v dd1 input power is off, the ADUM1510 outputs take on a default low logic condition. as the v dd1 supply is increased or decreased, the output of each channel transitions from/to the default condition to/from the state matching its respective signals (see figure 13 and figure 14). output data 2v (typ) v dd1 0 6790-013 figure 13. v dd1 power-up/power-down characteristics, input data = high v dd1 output data 06790-014 figure 14. v dd1 power-up/power-down characteristics, input data = low when v dd1 crosses the threshold for activating the refresh circuit (approximately 2 v), there can be a delay of up to 2 s before the output is updated to the correct state, depending on the timing of the next refresh pulse. when v dd1 is reduced from an on state below the 2 v threshold, there can be a delay of up to 5 s before the output takes on its default low state. this corresponds to the duration that the watchdog timer circuit at the input is designed to wait before triggering an output default state. http://
ADUM1510 data sheet rev. b | page 10 of 12 output high ~2 v v d d 2 v d d 2 ~1 v output high-z output low output high-z output low 06790-015 when the v dd2 output supply is below the level at which the ADUM1510 output transistors are biased (approximately 1 v), the outputs take on a high impedance state. when v dd2 is above a value of approximately 2 v, each channel output takes on a state matching that of its respective input. between the values of 1 v and 2 v, the outputs are set low. this behavior is shown in figure 15 and figure 16 . figure 15. v dd2 power-up/power-down characteristics, input data = high output low ~2 v v d d 2 v d d 2 ~1 v output high-z output low output high-z output low 06790-016 figure 16. v dd2 power-up/power-down characteristics, input data = low http://
data sheet ADUM1510 rev. b | page 11 of 12 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-013-aa 10.50 (0.4134) 10.10 (0.3976) 0.30 (0.0118) 0.10 (0.0039) 2.65 (0.1043) 2.35 (0.0925) 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 0 . 7 5 ( 0 . 0 2 9 5 ) 0 . 2 5 ( 0 . 0 0 9 8 ) 45 1.27 (0.0500) 0.40 (0.0157) c oplanarity 0.10 0.33 (0.0130) 0.20 (0.0079) 0.51 (0.0201) 0.31 (0.0122) seating plane 8 0 16 9 8 1 1.27 (0.0500) bsc 03-27-2007-b figure 17. 16-lead standard small outline package [soic_w] wide body (rw-16) dimensions shown in millimeters and (inches) ordering guide model 1 number of inputs, v dd1 side number of inputs, v dd2 side maximum data rate maximum propagation delay, 5 v maximum pulse width distortion temperature range package description package option ADUM1510brwz 5 0 10 mbps 50 ns 5 ns ?40c to +105c 16-lead soic_w rw-16 ADUM1510brwz-rl 5 0 10 mbps 50 ns 5 ns ?40c to +105c 16-lead soic_w, 13 tape and reel rw-16 1 z = rohs compliant part. http://
ADUM1510 data sheet rev. b | page 12 of 12 notes ?2008C2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06790-0-3/12(b) http://

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